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      Irvine, CA  
      Jhubei, Taiwan
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  Employment Opportunities
 
 
Irvine (Orange County), California

Current openings in our Irvine office.

  • Senior Mixed-Signal Design Engineer
  • ASIC Design Engineer
  • Senior ASIC Design Engineer
  • Senior Image Processing Engineer / Image Scientist
  • Hardware Engineer

If you are interested in being a part of an exciting startup company, please email your resume to us at jobs@himaximaging.com and indicate the specific position in the subject line.

 

Current Openings

Position: Senior Mixed-Signal Design Engineer
Number of Positions: 1
Category: Engineering
Position Type: Full-time
Travel Requirement: <10%

Description:
This role involves design and execution of circuits related to CMOS Image Sensor, such as ADC, DAC, Programmable Gain Amplifier, etc. The candidate will work closely with a team that has expertise in device physics, analog / digital circuit design, and image processing. This position requires close interaction with foundry, testing, packaging, and system house. Work with marketing / application engineers to translate product specifications in to circuit requirements and perform tradeoff analysis. Participate in system level architectural design of sensors and SOC.

Requirements:
• BS EE required, MS EE preferred with minimum 5 years of experience
• Proficient in CAD tools such as HSPICE, HSIM, Cadence
• Experience in low-noise switch-capacitor circuit design necessary
• Experience in layout is required
• Proven track record of taking design to mass production is necessary, including chip debugging and yield improvement
• Knowledge of ADC, PLL, DAC, Voltage Reference design is stressed
• System-level knowledge is a plus
• Experience in CMOS Image Sensor field / semiconductor device physics is a plus
• Good communication skills, team player spirit

 

Position : ASIC Design Engineer
Number of Positions: 1

Category : Engineering
Position Type : Full-Time
Travel Requirement : < 10 %


Description:
This position will work closely with the design and system teams using advance tools and technologies to develop CMOS image sensor and SOC solutions for mobile consumer electronics and smart sensor markets. In this role, you will be a key contributor to block level RTL implementation with minimal supervision from senior engineers. Other job responsibilities include design verification and debug support through simulations and FPGA test. Qualified candidate should possess strong VLSI design techniques including RTL/logic design, behavioral and gate level simulations, timing, power analysis and closure, gate count optimization, and tradeoff analysis. We are seeking people who are self motivated and work extremely well in a team environment.

Requirements:
• BSEE degree with 4 years of experience, or MSEE with 2 years of experience.
• Strong Verilog HDL programming skill is a must. Individual with solid experience in simulation modeling, block and chip level verification, and RTL synthesis will be highly welcome.
• Solid experience of working with system/hardware engineers to port tests to FPGA prototyping systems, silicon bring up and chip validation is a plus.
• Knowledge of ISP algorithm, concepts of CMOS image sensor, and understanding of analog/digital interfaces and techniques is definitely a plus.
• Requires excellent communication skills, well organized, methodical and detail oriented.


Position : Senior ASIC Design Engineer
Number of Positions: 1

Category : Engineering
Position Type : Full-Time
Travel Requirement : < 10 %

Description:
Work closely with the design, algorithm, and system teams using advance tools and technologies to develop CMOS image sensor and SOC solutions for mobile consumer electronics and smart sensor markets. As a key contributor, the candidate will be responsible for the top level integration of the Image Signal Processing blocks and be deeply involved in the entire tape out process, from defining hardware implementation specification to verifying block and chip level functionality. The qualified candidate should possess strong VLSI design techniques including RTL/logic design, behavioral and gate level simulations, timing and power analysis and closure, gate count optimization, and tradeoff analysis. We are seeking people who are well organized, methodical, detail oriented and self motivated.

Requirements:
• BSEE degree and 8 years of experience, or MSEE and 6 years of experience.

• Knowledge and experience in CMOS Sensor ISP field is a plus.
• Strong Verilog HDL programming skill is a must. Solid experience in simulation modeling, block and chip level verification, and RTL synthesis are also required.
• Work with system and hardware engineers to prototype and test designs in FPGA and other environments, silicon bring up and validation, etc.
• Hands on lab experience with a variety of test equipment including oscilloscopes and logic analyzers.
• TCL, and C/C++ programming skills preferred; System Verilog or assertion based verification background a plus.
• Knowledge of ISP algorithm, concepts of CMOS image sensor, and understanding of analog/digital interfaces and techniques is definitely a plus.
• Excellent communication and presentation skills

 

Position: Senior Image Processing Engineer / Image Scientist
Number of Positions: 1

Category: Engineering
Position Type: Full-Time
Travel Requirement: <10 %

Description:

This is a great opportunity to architect and contribute to integrated image processing solutions for image sensor and system-on-chip products. The candidate will work closely with sensor designers, image characterization engineers and marketing to identify, design and evaluate innovative image processing algorithms to solve complex technical issues.

 

Requirements:
•
M.S./Ph.D in Engineering, Applied mathematics, Image Processing or related discipline
•
5 years minimum experience in image processing algorithms with background in advanced filtering, color reproduction, automated threshold selection, pattern recognition, statistical analysis, etc.

• Proficiency in C, C++ and / or Matlab coding to design and run simulations for complex image pipeline
•
Experience with developing and implementing test scenarios to evaluate the performance of imaging algorithms

• Background in image processing in related industries, such as digital still camera or surveillance camera is a plus
•
Team player with good communication and presentation skills

• Well organized, methodical, and detail oriented.

Position: Hardware Engineer
Number of Positions: 1
Category: Engineering
Position Type: Full-Time
Travel Requirement: <10 %

Requirements:
• BS in Electrical Engineering, Optical Engineering or related technical field with 2 years of experience.

• Image sensor characterization, data collection, and analysis. Skilled at Excel spreadsheet or any other data reporting tool.

• Fluent with use of lab equipment such as oscilloscope, multimeter, waveform generator, and logic analyzer.

• Hands-on experience with hardware assembly of printed circuit boards, test, debug and rework

• Motivated to learn and willing to take on different work tasks.

• Well organized, methodical, and detail oriented.

 



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